This invention relates generally to receivers in radio telephone communication systems, and more particularly to radio receivers that receive Code Division Multiple Access (CDMA) signals.
The cellular telephone industry has made phenomenal strides in commercial operations in the United States as well as the rest of the world. Growth in major metropolitan areas has far exceeded expectations and is outstripping system capacity. If this trend continues, the effects of rapid growth will soon reach even the smallest markets. Innovative solutions are required to meet these increasing capacity needs as well as maintain high quality service and avoid rising prices.
Throughout the world, one important step in cellular systems is to change from analog to digital transmission. Equally important is the choice of an effective digital transmission scheme for implementing the next generation of cellular technology. Furthermore, it is widely believed that the first generation of Personal Communication Networks (PCNs) employing low cost, pocket-size, cordless telephones that can be carried comfortably and used to make or receive calls in the home, office, street, car, etc. would be provided by cellular carriers using the next generation of digital cellular system infrastructure and cellular frequencies. The key feature demanded of these new systems is increased traffic capacity.
Currently, channel access is achieved using Frequency Division Multiple Access (FDMA), Time Division Multiple Access (TDMA) and Code Division Multiple Access (CDMA) methods. In FDMA systems, a communication channel is a single radio frequency band into which a signal's transmission power is concentrated. Interference with adjacent channels is limited by the use of bandpass filters that only pass signal energy within the filters' specified frequency bands. Thus, with each channel being assigned a different frequency, system capacity is limited by the available frequencies as well as by limitations imposed by channel reuse.
In TDMA systems, a channel consists of a time slot in a periodic train of time intervals over the same frequency. Each period of time slots is called a frame. A given signal's energy is confined to one of these time slots. Adjacent channel interference is limited by the use of a time gate or other synchronization element that only passes signal energy received at the proper time. Thus, the problem of interference from different relative signal strength levels is reduced.
Capacity in a TDMA system is increased by compressing the transmission signal into a shorter time slot. As a result, the information must be transmitted at a correspondingly faster burst rate that increases the amount of occupied spectrum proportionally.
With FDMA or TDMA systems or hybrid FDMA/TDMA systems, the goal is to ensure that two potentially interfering signals do not occupy the same frequency at the same time. In contrast, CDMA systems allow signals to overlap in both time and frequency. Thus, all CDMA signals share the same frequency spectrum. In both the frequency and the time domain, the multiple access signals overlap. Various aspects of CDMA communications are described, for example, in "On the Capacity of a Cellular CDMA System," by Gilhousen, Jacobs, Viterbi, Weaver and Wheatley, IEEE Trans. on Vehicular Technology, May 1991.
In a typical CDMA system, the informational data stream to be transmitted is impressed upon a much higher bit rate data stream generated by a Pseudo Random Noise code (PNcode) generator. The informational data stream and the high bit rate data stream are typically multiplied together. This combination of higher bit rate signal with the lower bit rate data stream is called coding or spreading the informational data stream signal. Each informational data stream or channel is allocated a unique spreading code. A plurality of coded information signals are transmitted on radio frequency carrier waves and jointly received as a composite signal at a receiver. Each of the coded signals overlaps all of the other coded signals, as well as noise-related signals, in both frequency and time. By correlating the composite signal with one of the unique spreading codes, the corresponding information signal is isolated and decoded.
There are a number of advantages associated with CDMA communication techniques. The capacity limits of CDMA-based cellular systems are projected to be up to twenty times that of existing analog technology as a result of the wideband CDMA system's properties such as improved coding gain/modulation density, voice activity gating, sectorization and reuse of the same spectrum in every cell. CDMA is virtually immune to multi-path interference, and eliminates fading and static to enhance performance in urban areas. CDMA transmission of voice by a high bit rate encoder ensures superior, realistic voice quality. CDMA also provides for variable data rates allowing many different grades of voice quality to be offered. The scrambled signal format of CDMA eliminates cross-talk and makes it very difficult and costly to eavesdrop or track calls, insuring greater privacy for callers and greater immunity from air time fraud. In communication systems following the CDMA or "spread spectrum" concept, the frequency spectrum of an informational data stream is spread using a code uncorrelated with that of the data signals. The codes are also unique to every user. This is the reason why a receiver that has knowledge about the code of the intended transmitter is capable of selecting the desired signal.
There are several different techniques to spread a signal. Two of the most popular are Direct-Sequence (DS) and Frequency-Hopping (FH), both of which are well known in the art. According to the DS technique the data signal is multiplied by an uncorrelated code referred to as a Pseudo Random Noise Code (PNcode). A PNcode is a sequence of chips (bits) valued at -1 and 1 (polar) or 0 and 1 (non-polar) and has noise like properties. One way to create a PNcode is by means of at least one shift register. When the length of such a shift register is N, the period N.sub.DS is given by the equation N.sub.DS =2.sup.n -1.
In a receiver in a CDMA system, the received signal is multiplied again by the same (synchronized) PNcode. Since the code consists of +1's and -1's, this operation removes the code from the signal and the original data signal is left. In other words, the despreading operation is the same as the spreading operation.
FIG. 1 is a block diagram of a conventional correlator, which is used to compute correlations between the last M signal samples received and an M-bit codeword. An M-element delay line 10 stores received signal samples and sequentially shifts them through each of the M stages. Consequently, the delay line memory elements contain the last M signal sample values received. After each new sample is shifted in and one old sample is shifted out, the M sample values are read out of the delay line into M sign-changers 12, where the M sample values are multiplied by +1 or -1 according to the bits b . . . b of a predetermined code with which correlation is to be computed. The sign-changed values are then summed in adder 13 to produce a correlation result.
In general, the process of correlating a 64-element vector A=(a1, a2, . . . a64) with another 64-element vector C=(c1, c2, . . . c64) involves forming the inner product A*C=a1*c1+a2*c2+ . . . a64*c64. When the elements of one of the vectors (e.g., C) comprises only binary values (arithmetically +1 or -1), the products such as a1*c1 simplify to .+-.a1, but the process of adding the 64 values.+-.a1.+-.a2.+-. . . . .+-.a64 is still a significant effort when it has to be performed for every new value of "a" received. In the above example, the vector length (64) is used for illustrative purposes only. One of ordinary skill in the art will realize that any length vector could be used.
The prior art includes many variations of the correlator shown in FIG. 1. For example, signal samples may be single-bit or "hard-limited" quantities of only +1 or -1 instead of multi-bit quantities. The sign-changers used then are typically simple XOR gates. In that case, the adder 13 may first add pairs of single-bit values to obtain M/2 two bit values; M/4 two-bit adders then add two-bit values to obtain M/4 three-bit values, and so on. Such a structure, known as an "adder tree", is simpler when the input values are single-bit rather than multi-bit values.
For single-bit value signal samples, the adder tree can be replaced by an up/down counter that scans the M values, and counts up when a +1 is encountered and down when a -1 is encountered. Likewise, for multi-bit value signal samples, a parallel adder tree can be replaced by a sequential adder that extracts each of the M values, in turn, from the delay line memory and adds it to an accumulator. In the latter case, the logic employed must operate M-times as fast as in the parallel adder case. Consequently, there is a trade-off between the overall speed of the correlator and the logic complexity. Nevertheless, in each of the above-described prior art correlator variations, it is necessary to combine M values anew after each new signal sample is received.
Another depiction of a conventional matched filter or correlator is shown in FIG. 2. The received signal is sampled at a rate Fc samples per second, and the samples are entered sequentially to the inputs of multipliers, denoted by X. The 64 multipliers each have one bit of a PNcode as their second input value, shown as C1, C2, C3 . . . C64 (for a matched filter having length 64), in FIG. 2. In this conventional matched filter, a current input sample a(i) is multiplied by C1 in the leftmost multiplier, and the multiplier output C1.multidot.a(i) is fed to a one sample delay element D1. The value will emerge from the delay element D1 at the next sample period when a(i+1) is input to all the multipliers. As the value C1.multidot.a(i) emerges from delay element D1 into the first input of a first summer, C2 multiplies input sample a(i+1) to obtain a value C2.multidot.a(i+1) and applies this product to the second input of the first summer. The output of the first summer is then C1.multidot.a(i)+C2.multidot.a(i+1) which enters delay element D2. The value emerges from D2 in the next sample period when a(i+2) is input to the multipliers. The output from D2 is thus added to C3.multidot.a(i+2) and the result is input into delay element D4, and so forth. Thus, it may be seen that after 64 samples have been input, the following value emerges from the rightmost summer: EQU C1.multidot.a(i)+C2.multidot.a(i+1)+C3.multidot.a(i+2)+ . . . +C64.multidot.a(i+63)
which is a 64-sample correlation between the values C1 . . . C64 and the signal samples a(i) . . . a(i+63).
Upon each successive signal sample being entered, a new 64-point correlation is computed between, successively, the signal samples: EQU a(i+1) . . . a(i+64) EQU a(i+2) . . . a(i+65)
The resulting correlations appear to be a combination of the coefficients C1 . . . C64 with 64 signal samples selected according to a sliding window 64-samples wide. Hence, another term for this matched filter is "sliding correlator".
The device of FIG. 1 performs, at each sample clock period, 64 multiplications and 64 additions. This consumes a large amount of power, particularly when the power supply is a portable supply such as a battery. There is thus a need for a matched filter that minimizes computations to reduce power consumption.